A semiconductor chip may be mechanically and electrically interconnected to a circuitized substrate (e.g., a circuit board) of an electronic package, such as a chip carrier, by having conductive contacts on the chip (e.g., solder balls) solderably coupled to electrically conductive circuit members on the top surface of the chip carrier. For example, there may be large metal pads, such as copper pads, on the bottom of the chip carrier to accommodate a ball grid array of solder balls for coupling the chip carrier to a circuit card, and smaller amounts of metal on the top surface of the chip carrier, such as in the form of copper electrically conductive circuit members which comprise circuitization and/or pads for solderably joining the semiconductor chip to the chip carrier. The chip carrier may also include multiple layers of a flexible or compliant dielectric material and may exhibit substantial flexible characteristics. During build and operation of the chip carrier, including power up and power down cycling, the chip carrier experiences temperature changes. During these temperature changes, a spatial distribution of coefficient of thermal expansion (CTE) in the chip carrier coupled with the compliancy of the chip carrier, may cause the chip carrier to bow (or flex) upward or downward and thus deviate from planarity.
This chip carrier flexing increases in severity if a substantial portion of the chip carrier is made of compliant material, such as compliant organic material which cannot be easily handled (e.g., a material having a stiffness of less than about 10 Million pounds per square inch (Mpsi)). An organic chip carrier that is highly compliant may benefit from a rigid “stiffener ring” bonded to an outer perimeter of the top surface of the organic chip carrier in order to enhance the structural characteristics of the organic chip carrier. That is, the stiffener ring makes the organic chip carrier more mechanically stable and thus easier to handle. Unfortunately the stiffener ring assembly with bonding adhesive acts as a mechanical clamp on the outer perimeter of the organic chip carrier that constrains outer portions of the chip carrier from expanding, particularly when subjected to elevated and varying temperature. This constraint can occur during processing and usage, even if the thermal expansion coefficients of the stiffener ring and the organic chip carrier are matched, due to temperature gradients within the chip carrier which can cause expansion mismatches. Further, the bonding adhesive may also have thermomechanical expansion characteristics which are different than those of the organic chip carrier. In contrast, center portions of the organic chip carrier, to which a chip is typically attached, are not constrained by the stiffener ring. Thus, expansion of the central portions, when heated, accentuates chip carrier bowing by causing a distinct upward bulge in the central portion of the organic chip carrier.
An adverse consequence of chip carrier bowing during build and operation of the chip carrier, particularly when a bonded stiffener ring is used with a compliant organic chip carrier, can be unreliable decoupling of a chip assembled to the chip carrier at the electrical interconnections as illustrated in FIGS. 1 and 2. FIG. 1 illustrates a chip carrier 1 having a semiconductor chip 2 electrically interconnected to circuitized substrate 4 at ambient room temperature, wherein a top surface 6 of the circuitized substrate is substantially flat, and where solder balls 8 and 10 on semiconductor chip 2 are electrically interconnected by solder bumps 12 and 14 to the conductive pads 16 and 18 on the top surface of the circuitized substrate. Circuitized substrate 4 further includes at least one metal layer 20 and layers of compliant non-reinforced dielectric material 22 and 24. A stiffener ring 26 is bonded to the outer perimeter of circuitized substrate 4 by an interfacing adhesive 28. FIG. 2 shows chip carrier 1 of FIG. 1 under temperature elevation, which occurs during the heating stage of the chip joining reflow operation or during operational thermal cycling. At the elevated temperature, the center of chip carrier 1 bows or bulges upward in the direction 30, such that solder bump 14 is in compression while solder bumps 12 are in tension and are stretched. It should be obvious that if excessive bowing occurs during the chip joining reflow operation, separation 32 could occur and tend to produce unreliable solder connections, possibly preventing joining. The added stress of stretching joined solder bumps 12 can damage the bumps. Repeated thermal cycles can result in cracking or complete separation 32 of solder bumps 12. This can result in loss of electrical contact or failure between solder balls 8 of semiconductor chip 2 and conductive pads 16 of circuitized substrate 4, forming an open circuit.
The invention is directed at overcoming the problems set forth above. It is desirable to have an electronic package and a method to make the electronic package that reduces or eliminates flexing of a compliant organic chip carrier during operation to substantially prevent failure of the solder connections between the compliant organic chip carrier and the semiconductor chip.